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[Computer Architecture] Performance 본문

Computer Science/Computer Architectures

[Computer Architecture] Performance

EUG 2024. 1. 10. 00:47

Integrated Circuit Cost

Yield : percentage of correctly working dies

Cost per die = Cost per wafer / Dies per wafer * Yield

Dies per wafer ≈ Wafer area / Die area

Yield = 1 / (1 + (Defects per area * Die area) )^N

Die area와 Cost per die는 정비례!!

Chiplet Trend

  • multiple small chips
  • semiconductor technology

Response Time and Throughput

Response time (latency)

  • Duration

Throughput

  • number of tasks

CPU Time

CPU Time = CPU Clock Cycles * Clock Cycle Time
= CPU Clock Cycles / Clock Rate

ex
2 GHz -> 2*10^9 times/sec -> 0.5ns
1 GHz -> 10^9 times/sec -> 1ns

CPU Clocking

Clock period : the duration for the clock signal toggles 1 -> 0 -> 1

Clock Frequency (rate) : The number of clock cycles per second

Instruction Count and CPI (without pipelining)

Clock Cycles = Instruction Count * Cycles Per Instruction
CPU Time = Instruction Count * CPI * Clock Cycle Time
= ( Instruction Count * CPI )/ Clock Rate

Instruction Count (IC) : Number of instructions
Cycles Per Instruction (CPI) (detemined by the processor, insturcion type)

Performance Summary

CPU Time = Seconds / Program
= Instructions / Program
= Clock cycles / Instruction
= Seconds / Clock cycle

Amdahl's Law

T(improved) = (T(affected) / improvement factor ) + T(unaffected)